FIG. 1 includes a circuit diagram of a nonvolatile random access memory cell 1. The memory cell 1 includes a ferroelectric capacitor 2 and an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) 3. The gate of the MOSFET 3 is coupled to word line WL. A source/drain region of MOSFET 3 is coupled to bit line BL. One electrode of the ferroelectric capacitor 2 is coupled to the other source/drain region of MOSFET 3 and the other electrode of ferroelectric capacitor 2 is coupled to drive line DL. Memory cell 1 is an example of a one transistor, one capacitor NVRAM cell. In other embodiments, NVRAM cells include two transistors and one ferroelectric capacitor or four transistors and two ferroelectric capacitors. For the two and four transistor NVRAMs, equal numbers of p-channel and n-channel transistors are used. These other memory cells are known to those skilled in the art.
FIG. 2 includes a plan view of one type of NVRAM cell 1. The plan view of NVRAM cell 20 includes an interconnect 21 that is the bit line, a polysilicon conductive member 22 that is a word line, an active region 23, a conductive strap 24, a ferroelectric capacitor 25, and a drive line 26. Field isolation region 28 lies everywhere outside the active region 23. The interconnect 21, polysilicon conductive member 22, conductive strap 24, ferroelectric capacitor 25, and drive line 26 overlie the field isolation region 28. The interconnect 21 and conductive strap 24 are formed from the same layer. Therefore, the bit line cannot be formed over the ferroelectric capacitor 25, and the memory cell tends to be relatively large.
In conventional NVRAMs, the drive line is typically connected to a row or column of ferroelectric capacitors similar to the capacitor 2 as shown in FIG. 1. The drive line may be electrically connected to a thousand ferroelectric capacitors that lie along that row or a column. When accessing any of the memory cells along the drive line, all ferroelectric capacitors along that row or column are affected.
A problem with ferroelectric capacitors within NVRAMs is that they suffer from a problem called "fatigue." After the potential on a ferroelectric capacitor has been switched millions of times, eventually the ferroelectric capacitor cannot hold a remanent polarization necessary for an NVRAM cell. In such a case, the memory cell is no longer functional as an NVRAM cell.